Time-to-digital converters are designed to generate a digital representation of a time interval elapsing between two events. TDC's discretize time intervals, just as analog-to-digital converters (ADC's) discretize analog signal amplitudes. The difference between an actual time interval and the discretized version of that time interval is known as the quantization error, and is determined by the TDC resolution.
TDC resolution is typically limited by the delay of a unit cell in a delay line of the TDC. For example, the delay may be the gate delay of an inverter, which is a characteristic of the particular semiconductor processing technology employed. For certain high-speed TDC applications, it would be desirable to have design techniques to improve TDC resolution to beyond the delay of a unit cell.